عنوان
پدید آورنده
موضوع
رده
TK 7874 .W34 1987
TK
7874
.
W34
1987
کتابخانه
محل استقرار
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Yield simulation for integrated circuits
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Boston
Name of Publisher, Distributor, etc.
Kluwer Academic Publishers
Date of Publication, Distribution, etc.
c1987
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
x, 209 p. :ill. ;25 cm
GENERAL NOTES
Text of Note
Based on author's thesis )Ph. D.(
Text of Note
Includes index
Text of Note
Bibliography: p. ]189[- 206.
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
by Duncan Moore Henry Walker
ORIGINAL VERSION NOTE
Text of Note
1
TOPICAL NAME USED AS SUBJECT
Entry Element
، Integrated circuits- Very large scale integration- Design and construction- Mathematical models
Entry Element
، Integrated circuits- Very large scale integration- Design and construction- Data processing
Entry Element
، Integrated circuits- Very large scale integration- Defects- Mathematical models
Entry Element
، Integrated circuits- Very large scale integration- Defects- Data processing
Entry Element
، Monte Carlo method
DEWEY DECIMAL CLASSIFICATION
Number
621
.
381/73
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7874
.
W34
1987
OTHER CLASS NUMBERS
Class number
NO
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Walker, Duncan Moore Henry.
Relator Code
AU
SE Kluwer international series in engineering and computer science ; SECS 33.
AU Kluwer international series in engineering and computer science. ۲p VLSI, computer architecture, and digital signal processing. Series:Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing.
TI
