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عنوان
Synthesizable VHDL design for FPGAS

پدید آورنده
bezerra,eduardo augusto

موضوع
، VHDL )Computer hardware description language(

رده
TK
7885
.
7
B4

کتابخانه
Central Library of Hamedan University of Technology

محل استقرار
استان: Hamedan ـ شهر: Hamedan

Central Library of Hamedan University of Technology

تماس با کتابخانه : 38411100-081

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper
Synthesizable VHDL design for FPGAS

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.
New York
Name of Publisher, Distributor, etc.
Springer
Date of Publication, Distribution, etc.
2014

PHYSICAL DESCRIPTION

Specific Material Designation and Extent of Item
]156[p.:ill,diagram

GENERAL NOTES

Text of Note
Bibliography: p. ]156[

NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY

Text of Note
eduardo augusto bezerra,djones vinicius lettnin

ORIGINAL VERSION NOTE

Text of Note
1

TOPICAL NAME USED AS SUBJECT

Entry Element
، VHDL )Computer hardware description language(

LIBRARY OF CONGRESS CLASSIFICATION

Class number
TK
7885
.
7
B4

PERSONAL NAME - PRIMARY RESPONSIBILITY

Entry Element
bezerra,eduardo augusto
Relator Code
TI

AU lettnin,djones vinicius
TI

Proposal/Bug Report

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