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عنوان
Pipelined multiprocessor system-on-chip for multimedia

پدید آورنده
/ Haris Javaid, Sri Parameswaran

موضوع
Engineering,Circuits and Systems,Processor Architectures,Electronics and Microelectronics, Instrumentation,Embedded computer systems, Design and construction,Multiprocessors,Systems on a chip

رده
E-BOOK

کتابخانه
Central Library, Center of Documentation and Supply of Scientific Resources

محل استقرار
استان: East Azarbaijan ـ شهر:

Central Library, Center of Documentation and Supply of Scientific Resources

تماس با کتابخانه : 04133443834

INTERNATIONAL STANDARD BOOK NUMBER

(Number (ISBN
9783319011127

NATIONAL BIBLIOGRAPHY NUMBER

Country Code
IR
Number
EN-57502

LANGUAGE OF THE ITEM

.Language of Text, Soundtrack etc
انگلیسی

COUNTRY OF PUBLICATION OR PRODUCTlON

Country of publication
IR

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper
Pipelined multiprocessor system-on-chip for multimedia
General Material Designation
[Book]
First Statement of Responsibility
/ Haris Javaid, Sri Parameswaran

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.
Cham
Name of Publisher, Distributor, etc.
: Springer,
Date of Publication, Distribution, etc.
, 2014.

NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.

Text of Note
Electronic

INTERNAL BIBLIOGRAPHIES/INDEXES NOTE

Text of Note
Includes bibliographical references and index..

CONTENTS NOTE

Text of Note
Summary: This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers.
Text of Note
Introduction -- Literature Survey -- Optimisation Framework -- Performance Estimation of Pipelined MPSoCs -- Design Space Exploration of Pipelined MPSoCs -- Adaptive Pipelined MPSoCs -- Power Management in Adaptive Pipelined MPSocs -- Multi-mode Pipelined MPSoCs -- Conclusions and Future Work.

TOPICAL NAME USED AS SUBJECT

Engineering
Circuits and Systems
Processor Architectures
Electronics and Microelectronics, Instrumentation
Embedded computer systems, Design and construction
Multiprocessors
Systems on a chip

LIBRARY OF CONGRESS CLASSIFICATION

Class number
E-BOOK

PERSONAL NAME - SECONDARY RESPONSIBILITY

Javaid, Haris
Parameswaran, Sri,1962-

ORIGINATING SOURCE

Country
ایران

ELECTRONIC LOCATION AND ACCESS

Host name
9783319011127.pdf
Access number
عادی
Compression information
عادی
Date and Hour of Consultation and Access
9783319011127.pdf
Electronic Format Type
متن

old catalog

e

BL
1

a
Y

Proposal/Bug Report

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