INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
9781441981035
NATIONAL BIBLIOGRAPHY NUMBER
Country Code
IR
Number
EN-55710
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
انگلیسی
COUNTRY OF PUBLICATION OR PRODUCTlON
Country of publication
IR
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Memory-based logic synthesis
General Material Designation
[Book]
First Statement of Responsibility
/ Tsutomu Sasao
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xii, 189 pages , illustrations , 24 cm
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Electronic
INTERNAL BIBLIOGRAPHIES/INDEXES NOTE
Text of Note
Includes bibliographical references (pages 179-186) and index.
CONTENTS NOTE
Text of Note
Introduction -- Basic elements -- Definitions and basic properties -- MUX-based synthesis -- Cascade-based synthesis -- Encoding method -- Functions with small C-measures -- C-measure of sparse functions -- Index generation functions -- Hash-based synthesis -- Reduction of the number of variables -- Various realizations -- Conclusions.
Text of Note
"This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book. Describes in detail the synthesis of logic functions using memories; Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis; Shows logic design methods for index generation functions; Introduces C-measure, which specifies the complexity of Boolean functions; Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching"--Publisher.
TOPICAL NAME USED AS SUBJECT
Logic circuits
Field programmable gate arrays, Design and construction
Semiconductor storage devices
LIBRARY OF CONGRESS CLASSIFICATION
Class number
E-BOOK
PERSONAL NAME - PRIMARY RESPONSIBILITY
Sasao, Tsutomu,1950-author.
ORIGINATING SOURCE
Country
ایران
ELECTRONIC LOCATION AND ACCESS
Host name
9781441981035.pdf
Access number
عادی
Compression information
عادی
Date and Hour of Consultation and Access
9781441981035.pdf
Electronic Format Type
متن
old catalog
e
BL
1
a
Y
