عنوان
پدید آورنده
موضوع
رده
TK 7885.7 .R87 1998
TK
7885
.
7
.
R87
1998
کتابخانه
محل استقرار
استان: Khorasan Razavi ـ شهر: Mashhad
OTHER STANDARD IDENTIFIER
Standard Number
21493
TITLE AND STATEMENT OF RESPONSIBILITY
First Statement of Responsibility
Rushton, Andrew.
Title Proper
VHDL for logic synthesis
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Chichester; New York
Name of Publisher, Distributor, etc.
Wiley
Date of Publication, Distribution, etc.
c1998
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xiii, 375p. : ill
GENERAL NOTES
Text of Note
Bibliography: p. ]359[
Text of Note
Includes index
NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY
Text of Note
Andrew Rushton
NOTES PERTAINING TO EDITION AND BIBLIOGRAPHIC HISTORY
Text of Note
2nd ed
TOPICAL NAME USED AS SUBJECT
Entry Element
، VHDL )Computer hardware description language(
Entry Element
Data processing ، Logic design
Entry Element
، Computer-aided design
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7885
.
7
.
R87
1998
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
TI
LOCATION AND CALL NUMBER
Call Number Suffix
CL
