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عنوان
Reasoning in Boolean networks: logic synthesis and verification using testing techniques

پدید آورنده
Kunz, Wolfgang

موضوع
، Integrated circuits-- Very large scale integration-- Testing-- Data processing,، Integrated circuits-- Verification-- Data processing,، Logic design-- Data processing

رده
TK
7874
.
K866
1997

کتابخانه
Central Library of Sharif University of Technology

محل استقرار
استان: Tehran ـ شهر: Tehran

Central Library of Sharif University of Technology

تماس با کتابخانه : 66005817-021

OTHER STANDARD IDENTIFIER

Standard Number
117251

LANGUAGE OF THE ITEM

.Language of Text, Soundtrack etc
تا‌بستا‌ن‌۸۷
.Language of Text, Soundtrack etc
English

TITLE AND STATEMENT OF RESPONSIBILITY

General Material Designation
)50(
First Statement of Responsibility
Kunz, Wolfgang
Title Proper
Reasoning in Boolean networks: logic synthesis and verification using testing techniques

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.
Boston
Name of Publisher, Distributor, etc.
Kluwer Academic Pub.
Date of Publication, Distribution, etc.
1997

PHYSICAL DESCRIPTION

Specific Material Designation and Extent of Item
xv, 230 p.: ill.; 25 cm

SERIES

Series Title
Frontiers in electronic testing

GENERAL NOTES

Text of Note
Includes bibliographical references and index

TOPICAL NAME USED AS SUBJECT

Entry Element
، Integrated circuits-- Very large scale integration-- Testing-- Data processing
Entry Element
، Integrated circuits-- Verification-- Data processing
Entry Element
، Logic design-- Data processing

LIBRARY OF CONGRESS CLASSIFICATION

Class number
TK
7874
.
K866
1997

PERSONAL NAME - PRIMARY RESPONSIBILITY

Relator Code
AU
Entry Element
by Wolfgang Kunz and Dominik Stoffel

AU kinimoD ,leffotS
TI

LOCATION AND CALL NUMBER

Shelving Form of Title, Author, Author/Title
05

Proposal/Bug Report

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