عنوان
پدید آورنده
موضوع
رده
TK 7872 .L64 C94
TK
7872
.
L64
C94
کتابخانه
محل استقرار
استان: Hormozgan ـ شهر: Bandar abbas
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Finite state machine logic synthesis for complex programmable logic devices
First Statement of Responsibility
Robert Czerwinski ,Dariusz Kania
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Berlin ; New York
Name of Publisher, Distributor, etc.
Springer
Date of Publication, Distribution, etc.
c2013
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xiv, 172 p. : ill. ; 25 cm.
SERIES
Other Title Information
Lecture notes in electrical engineering,6781-0011 ;132
GENERAL NOTES
Text of Note
Includes bibliographical references and index
TOPICAL NAME USED AS SUBJECT
Entry Element
، Sequential machine theory
Entry Element
، Programmable logic devices
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7872
.
L64
C94
PERSONAL NAME - PRIMARY RESPONSIBILITY
Entry Element
Czerwinski, Robert.
Relator Code
AU
AU Kania, Dariusz
