@BOOK{ Book!D - 100601071,
AUTHOR = "/ ط§ط³طھظپظ† ط¨ط±ط§ظˆظ†ظ¬ ط²ظˆظ†ع©ظˆ ظˆط±ط§ظ†ط³غŒط¬,â€ڈ‫ط¹ظ†ظˆط§ظ† ط§طµظ„غŒ: .Fundamentals of digital logic with Verilog design,3 nd, c2014‬,ط¨ط±ط§ظˆظ†,Braun",
TITLE = "ظ…ط¨ط§ظ†غŒ ظ…ط¯ط§ط± ظ…ظ†ط·ظ‚غŒ ط¨ط§ ظ†ط±ظ… ط§ظپط²ط§ط± Verilog",
LIBRARY= "کتابخانه دانشکدگان فارابی (دانشگاه تهران)",
SUBJECT = "â€ڈ‫ظ…ط¯ط§ط±ظ‡ط§غŒ ظ…ظ†ط·ظ‚غŒâ€¬â€¬,Logic circuits,â€ڈ‫ظˆط±غŒظ„ط§ع¯ (ط²ط¨ط§ظ† طھظˆطµغŒظپغŒ ط³ط®طھ‌ط§ظپط²ط§ط± ع©ط§ظ…ظ¾غŒظˆطھط±)‬‬,Verilog (Computer hardware description language),ط·ط±ط§ط­غŒ ط¨ظ‡ ع©ظ…ع© ع©ط§ظ…ظ¾غŒظˆطھط±,Computer-aided design, -- ط¯ط§ط¯ظ‡â€Œظ¾ط±ط¯ط§ط²غŒ, -- Data processing,a01,a01,a02,a02,a03,a03",
URL = "/book/100601071/ظططظغŒ-ظططط-ظظطظغŒ-طط-ظطظ-طظپطط/"}