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عنوان
Architectures for computer vision : from algorithm to chip with Verilog

پدید آورنده
Hong Jeong, Pohang University of Science an d Technology, South Korea From algorithm to chip with Verilog

موضوع
Verilog )Computer hardware description language(, Computer vision

رده
TK
7885
.
7
.
J46
2014

کتابخانه
Vali Asr University Central Library

محل استقرار
استان: Kerman ـ شهر: Rafsanjan

Vali Asr University Central Library

تماس با کتابخانه : 03431312520

NATIONAL BIBLIOGRAPHY NUMBER

Number
BL18558
Number
BL18553

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper
Architectures for computer vision : from algorithm to chip with Verilog
First Statement of Responsibility
Hong Jeong, Pohang University of Science an d Technology, South Korea From algorithm to chip with Verilog

PHYSICAL DESCRIPTION

Specific Material Designation and Extent of Item
xv, 450 pages ; 25 cm

NOTES PERTAINING TO TITLE AND STATEMENT OF RESPONSIBILITY

Text of Note
from algorithm to chip with Verilog

TOPICAL NAME USED AS SUBJECT

Entry Element
Verilog )Computer hardware description language(
Entry Element
Computer vision

LIBRARY OF CONGRESS CLASSIFICATION

Class number
TK
Book number
7885
.
7
Classification Record Number
.
J46
2014

PERSONAL NAME - PRIMARY RESPONSIBILITY

Entry Element
Jeong, Hong, author

PERSONAL NAME - ALTERNATIVE RESPONSIBILITY

Entry Element
Includes bibliographical references an d index

Proposal/Bug Report

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