INTERNATIONAL STANDARD BOOK NUMBER
(Number (ISBN
9789048196449
NATIONAL BIBLIOGRAPHY NUMBER
Country Code
IR
Number
EN-54711
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
انگلیسی
COUNTRY OF PUBLICATION OR PRODUCTlON
Country of publication
IR
TITLE AND STATEMENT OF RESPONSIBILITY
Title Proper
Design, Analysis and Test of Logic Circuits Under Uncertaint
General Material Designation
[Book]
First Statement of Responsibility
/ by Smita Krishnaswamy, Igor L. Markov, John P. Hayes
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Dordrecht
Name of Publisher, Distributor, etc.
: Springer Netherlands :Imprint: Springer,
Date of Publication, Distribution, etc.
, 2013.
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
XI, 123 p. 71 illus., online resource.
SERIES
Series Title
(Lecture Notes in Electrical Engineering,1876-1100
Volume Designation
; 115)
NOTES PERTAINING TO PUBLICATION, DISTRIBUTION, ETC.
Text of Note
Electronic
CONTENTS NOTE
Text of Note
Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, theystudyerror-maskingmechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for: - Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework; - Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations; - Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance; - Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility.
Text of Note
Introduction -- Probabilistic Transfer Matrices -- Computing with Probabilistic Transfer Matrices -- Testing Logic Circuits for Probabilistic Faults -- Signtaure-based Reliability Analysis -- Design for Robustness -- Summary and Extensions.
SERIES
Title
Lecture Notes in Electrical Engineering,1876-1100
Volume Number
115
TOPICAL NAME USED AS SUBJECT
Engineering
Computer hardware
Computer science
Logic design
Operating systems (Computers)
Algebra, Data processing
Systems engineering
Electronic books
LIBRARY OF CONGRESS CLASSIFICATION
Class number
E-BOOK
PERSONAL NAME - PRIMARY RESPONSIBILITY
Krishnaswamy, Smita.
PERSONAL NAME - SECONDARY RESPONSIBILITY
Markov, Igor L
Hayes, John P
SpringerLink (Online service)
ORIGINATING SOURCE
Country
ایران
ELECTRONIC LOCATION AND ACCESS
Host name
9789048196432.pdf
Access number
عادی
Compression information
عادی
Date and Hour of Consultation and Access
9789048196432.pdf
Electronic Format Type
متن
old catalog
e
BL
1
a
Y
