Menu
Home
Advanced Search
Directory of Libraries
About lib.ir
Contact Us
History
ورود / ثبت نام
عنوان
Digital design and Verilog HDL fundamentals
پدید آورنده
Cavanagh, Joseph J. F.
موضوع
، Logic circuits-- Computer-aided design,، Verilog )Computer hardware description language(,، Digital electronics
رده
TK
7868
.
D5
.
C3945
2008
کتابخانه
Central Library of Sharif University of Technology
محل استقرار
استان:
Tehran
ـ شهر:
Tehran
تماس با کتابخانه :
66005817
-
021
OTHER STANDARD IDENTIFIER
Standard Number
151466
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
بهار۹۸
.Language of Text, Soundtrack etc
English
TITLE AND STATEMENT OF RESPONSIBILITY
General Material Designation
)50(
First Statement of Responsibility
Cavanagh, Joseph J. F.
Title Proper
Digital design and Verilog HDL fundamentals
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Boca Raton
Name of Publisher, Distributor, etc.
CRC Press
Date of Publication, Distribution, etc.
2008
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
1147 p.: ill.; 27 cm.
GENERAL NOTES
Text of Note
Includes index
TOPICAL NAME USED AS SUBJECT
Entry Element
، Logic circuits-- Computer-aided design
Entry Element
، Verilog )Computer hardware description language(
Entry Element
، Digital electronics
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7868
.
D5
.
C3945
2008
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
Entry Element
Joseph Cavanagh
TI
LOCATION AND CALL NUMBER
Shelving Form of Title, Author, Author/Title
05
Proposal/Bug Report
×
Proposal/Bug Report
×
Warning!
Enter The Information Carefully
Error Report
Proposal