عنوان
پدید آورنده
موضوع
رده
TK 7895 .G36 .C484 2008
TK
7895
.
G36
.
C484
2008
کتابخانه
محل استقرار
OTHER STANDARD IDENTIFIER
Standard Number
151583
LANGUAGE OF THE ITEM
.Language of Text, Soundtrack etc
بهار۹۸
.Language of Text, Soundtrack etc
English
TITLE AND STATEMENT OF RESPONSIBILITY
General Material Designation
)12(
First Statement of Responsibility
Chu, Pong P.
Title Proper by Another Author
9591-
Title Proper
FPGA prototyping by Verilog examples: Xilinx Spartan -3 version
.PUBLICATION, DISTRIBUTION, ETC
Place of Publication, Distribution, etc.
Hoboken, N.J.
Name of Publisher, Distributor, etc.
J. Wiley & Sons
Date of Publication, Distribution, etc.
2008
PHYSICAL DESCRIPTION
Specific Material Designation and Extent of Item
xxvii, 488 p.: ill.; 26 cm.
GENERAL NOTES
Text of Note
Includes bibliographical references and index
TOPICAL NAME USED AS SUBJECT
Entry Element
، Field programmable gate arrays-- Design and construction
Entry Element
، Prototypes, Engineering
Entry Element
، Verilog )Computer hardware description language(
LIBRARY OF CONGRESS CLASSIFICATION
Class number
TK
7895
.
G36
.
C484
2008
PERSONAL NAME - PRIMARY RESPONSIBILITY
Relator Code
AU
Entry Element
Pong P. Chu
TI
LOCATION AND CALL NUMBER
Shelving Form of Title, Author, Author/Title
131
