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عنوان
SystemVerilog for verification

پدید آورنده
/ Chris Spear., Spear, Chris.

موضوع
Verilog (Computer hardware description language), Integrated circuits--Verification.

رده
TK
7885
.
7
.
S67
2006

کتابخانه
Library of College of Science University of Tehran

محل استقرار
استان: Tehran ـ شهر: Tehran

Library of College of Science University of Tehran

تماس با کتابخانه : 61112616-66495290-021

INTERNATIONAL STANDARD BOOK NUMBER

(Number (ISBN
0387270388

NATIONAL BIBLIOGRAPHY NUMBER

Country Code
IR
Number
E969

LANGUAGE OF THE ITEM

.Language of Text, Soundtrack etc
انگلیسی

COUNTRY OF PUBLICATION OR PRODUCTlON

Country of publication
IR

TITLE AND STATEMENT OF RESPONSIBILITY

Title Proper
SystemVerilog for verification
General Material Designation
[electronic resources]
Other Title Information
: a guide to learning the testbench language features
First Statement of Responsibility
/ Chris Spear.

.PUBLICATION, DISTRIBUTION, ETC

Place of Publication, Distribution, etc.
Boston, MA
Name of Publisher, Distributor, etc.
: Springer Science+Business Media, LLC
Date of Publication, Distribution, etc.
, 2006.

PHYSICAL DESCRIPTION

Specific Material Designation and Extent of Item
xxxiv, 301 p.
Other Physical Details
: ill.

INTERNAL BIBLIOGRAPHIES/INDEXES NOTE

Text of Note
Includes bibliographical references (p. [295]-296) and index.

TOPICAL NAME USED AS SUBJECT

Entry Element
Verilog (Computer hardware description language)
Entry Element
Integrated circuits--Verification.

LIBRARY OF CONGRESS CLASSIFICATION

Class number
TK
7885
.
7
Book number
.
S67
2006

PERSONAL NAME - PRIMARY RESPONSIBILITY

Entry Element
Spear, Chris.

CORPORATE BODY NAME - SECONDARY RESPONSIBILITY

SpringerLink (Online service)

ORIGINATING SOURCE

Country
ایران
Agency
University of Tehran. College of Science Library
Date of Transaction
20210611

ELECTRONIC LOCATION AND ACCESS

Date and Hour of Consultation and Access
UT_SCI_BL_DB_1001609_0001.pdf

old catalog

e

BL
278840
1

a
Y

Proposal/Bug Report

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